FPGA core board, features the ALTERA Cyclone IV chip EP4CE10F17C8N onboard
Overview
CoreEP4CE10 is an FPGA core board that features an EP4CE10F17C8N device onboard, supports further expansion.
- onboard Serial Configuration Device EPCS16SI8N
- integrated FPGA basic circuit, such as clock circuit
- onboard nCONFIG button, RESET button, 4 x LEDs
- all the I/O ports are accessible on the pin headers
- onboard JTAG debugging/programming interface
- 2.00mm header pitch design, suitable for being plugged-in your application system
What's On Board
![EP4CE10F17C8N core board on board resource](/img/devkit/CoreEP4CE10/CoreEP4CE10-intro.jpg)
- EP4CE10F17C8N:the ALTERA Cyclone IV FPGA device which features:
- Operating Frequency: 50MHz
- Operating Voltage: 1.15V~3.465V
- Package: BGA256
- I/Os: 164
- LEs: 10K
- RAM: 414kb
- PLLs: 2
- Debugging/Programming: supports JTAG
- AMS1117-3.3 (on bottom side), 3.3V voltage regulator
- AMS1117-2.5 (on bottom side), 2.5V voltage regulator
- AMS1117-1.2 (on bottom side), 1.2V voltage regulator
- EPCS16, onboard serial FLASH memory, for storing code
- Power indicator
- LEDs
- Reset button
- nCONFIG button: for re-configuring the FPGA chip, the equivalent of power reseting
- 50M active crystal
- JTAG interface: for debugging/programming
- FPGA pins expander, VCC, GND and all the I/O ports are accessible on expansion connectors for further expansion
Photos
Note:
CoreEP4CE10 provides JTAG debugging interface, yet does NOT integrate any debugging function, a debugger is required.
Mother board and programmer/debugger in the photos are NOT included in the price.
JTAG Interface
The figure below shows the header pinout of JTAG
Figure 1. JTAG Header Pinout
![JTAG Header Pinout](/img/devkit/general/JTAG-CPLD.jpg)
Development Resources
- Related software (Quaters II, NIOS II etc.)
- Demo code (Verilog, VHDL, NIOS II C)
- Schematic (PDF)
- FPGA development documentations
Wiki: www.waveshare.com/wiki/CoreEP4CE10